Gate oxides that are incorporated into 0.25 .mu.m CMOS processes are extremely thin, on the order of 3.5 to 4.0 nm thick. Such oxides need to be a highly reliable insulator. Techniques to grow these thin oxide layers involve the use of one or more of the following gases: O.sub.2 (oxygen), H.sub.2 O (water vapor), N.sub.2 O (nitrous oxide), and NO (nitric oxide).
In known prior art, the gate polysilicon is doped with phosphorous to form the N.sup.+ gate for both nMOS and pMOS devices. For smaller channel lengths, i.e., 0.25 .mu.m and below, it is necessary to form p.sup.+ doped polysilicon gates using boron for the pMOS devices to minimize short channel effects. The diffusion of boron through the gate oxide and into the channel region results in the shifting of threshold voltages and unpredictability in the performance of the ultimate circuit after fabrication, particularly as the device ages. Therefore, in devices where boron is present in the gate polysilicon it becomes necessary for the gate oxide to act as a barrier to the diffusion of boron atoms.